The present invention relates to a magnetic tunnel junction device and a memory device including the magnetic tunnel junction device, and more particularly to a magnetic tunnel junction device for storing multi-bit data in a limited area and having an advantage of scalability and a magneto-resistance memory device including the magnetic tunnel junction device.
A dynamic random access memory (DRAM), which is one of the most widely used semiconductor memory device, has advantages of high operation speed and high integration. However, the DRAM is a volatile memory device which loses data when a power is off, and a refresh process is periodically performed to prevent loss of stored data during operation. On the other hand, while a flash memory is a non-volatile memory device capable of high integration, the flash memory has slow operation speeds. In addressing above features of the DRAM and the flash memory, magneto-resistance random memory devices (MRAM) exhibit non-volatility, high operation speed, and high integration (scalability) capacity.
More specifically, an MRAM device is a non-volatile memory device where data is stored by magnetic storage elements having different resistance states according to magnetic field changes between ferromagnetic plates. The magnetic storage element is a component including two ferromagnetic plates separated by an insulating layer. If polarities of the two ferromagnetic plates are parallel (that is, their respective magnetic polarities are in the same directions), resistance of magnetic storage element is minimized. However, if polarities of the two ferromagnetic plates are oppositely oriented (that is, their respective magnetic polarities are in the opposite directions), the resistance is maximized. The MRAM device stores data based on cell's resistance changes according to magnetization of ferromagnetic plates in the magnetic storage element. As a magnetic storage element, a Magnetic Tunnel Junction (MD) is often used.
In the MRAM, the MTJ generally includes a stacked structure of a ferromagnetic layer, an insulating layer, and another ferromagnetic layer. When electrons passing through a first ferromagnetic layer enter an insulating layer serving as a tunneling barrier, electron's probability to penetrate into the insulating layer is determined by a magnetic direction of second ferromagnetic layer. If two ferromagnetic layers have the same polarity (that is, in a parallel magnetic direction), amount of current tunneling the insulating layer is maximized. Otherwise, if two ferromagnetic layers have opposite magnetic directions, amount of current is minimized. For example, when resistance recognized based on the tunneling current is high, information stored in the MTJ is in a logic level “1” (or “0”). If the resistance is low, information is in a logic level “0” (or “1”). Herein, one of two ferromagnetic layers is called a pinned layer because its polarity is set to particular set value, but the other is called a free layer because its polarity can be changed according to applied magnetic fields or supplied currents. Here, directions of a magnetic polarity can be along a horizontal plane or a vertical plane and can be along different directions in different layers having the magnetic polarity as appropriate. An MRAM includes a memory cell unit constituted with one transistor and one magneto-resistance storage element. When the memory cell unit typically stores one-bit data, an MRAM device includes a lot of memory cell units to store multi-bit data. However, as MRAMs are scaled down to be cost effective, storing one-bit data in a single memory cell unit is no longer a competitive method.